z/TPF Assembler Programming Features and Enhancements

Title: z/TPF Assembler Programming Features and Enhancements

Overview: This course details additions to the mainframe architecture used by z/TPF. Both the hardware additions as well as software changes available to z/TPF are discussed. Techniques for more efficient programming based on the new features are compared to the older methods of TPF application programming. Quizzes and sample programs are used to reinforce the lecture portion of the class.

Audience: This course is designed for Systems, Applications, and Coverage staff, who have experience with TPF.

Educational Objectives:

• Provide individuals with knowledge of details additions to the mainframe architecture used by z/TPF.

  The class is not intended as a detailed programming class. Rather, it is an overview of the recent, useful additions to the hardware and software architectures.

• New hardware features
  • Control Instructions
  • General Instructions for 64-Bit Integers
  • Other New General Instructions
  • Floating-Point Instructions
  • Addressing
  • Modal Instructions
  • Effects on Bits 0-31 of a General Register
  • Input/Output
• New software features
  • Program packaging
  • Program linkage
  • Application stack
  • “named” Heap
  • Sacrificing space for speed
• Review of TPF programming techniques

Prerequisites: Students must have a working knowledge of S/370 assembler and of programming in TPF.

Format: Lecture with students encouraged to ask questions throughout.

Maximum Class Size: 15

Duration: 3 days