|
As illustrated by the primer, increases in semiconductor circuit density can pose formidable interconnect challenges to the thermal, mechanical, and electrical
integrity of the packaged device. IBM's chip packaging technology is designed to support these new and advancing semiconductor technologies so that gains made at the wafer level are not lost or compromised
at the system level.
A chip carrier is the platform upon which chips, passive components, device encapsulants, and thermal enhancement hardware are attached. Wiring patterns within the carrier define escape paths
in both single chip modules (SCMs) and muti-chip modules (MCMs), transforming the tight I/O pitch at the chip level to a workable pitch at the board level. This also establishes the modules' power distribution
network. Vertical metal vias provide interconnections between the various layers within the chip carrier.
IBM manufactures both ceramic and organic chip carriers to supply advanced packaging solutions capable of supporting semiconductor technology of 0.18 micron (and less). The ceramic carriers are
packaged as ceramic ball grid, column grid, or land grid arrays. Organic carriers are packaged as plastic ball grid arrays.
|
